LLC2_API
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00001 /* ------------------------------------------------------------------------- */ 00002 /* acq200_ioctl.h defines ioctls and interface parameters for acq200 hostdrv */ 00003 /* ------------------------------------------------------------------------- */ 00004 /* Copyright (C) 2006 Peter Milne, D-TACQ Solutions Ltd 00005 * <Peter dot Milne at D hyphen TACQ dot com> 00006 00007 This program is free software; you can redistribute it and/or modify 00008 it under the terms of Version 2 of the GNU General Public License 00009 as published by the Free Software Foundation; 00010 00011 This program is distributed in the hope that it will be useful, 00012 but WITHOUT ANY WARRANTY; without even the implied warranty of 00013 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00014 GNU General Public License for more details. 00015 00016 You should have received a copy of the GNU General Public License 00017 along with this program; if not, write to the Free Software 00018 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ 00019 /* ------------------------------------------------------------------------- */ 00020 00021 00022 #ifndef __ACQ200_IOCTL_H__ 00023 #define __ACQ200_IOCTL_H__ 00024 00025 #include <asm/ioctl.h> 00026 #include <asm/types.h> 00027 00028 #define DMAGIC 0xDA 00029 00030 #define MBOX_NUM 4 00031 #define MBC_FLAGS_TO 0xffff /* timeout in jiffies */ 00032 #define MBC_FLAGS_TO_FOREVER 0 00033 #define MBC_FLAGS_MBXW 0x000f0000 /* mask mailboxes to write */ 00034 #define MBC_FLAGS_MBXR 0x00f00000 /* mask mailboxes to read */ 00035 #define MBC_FLAGS_ONRELEASE 0x10000000 /* action this command on release */ 00036 00037 #define MBC_TO_MBXW(mx) ((mx) << 16) 00038 #define MBC_FROM_MBXW(mbc) (((mbc->mbc_flags)&MBC_FLAGS_MBXW) >> 16) 00039 00040 #define MBC_TO_MBXR(mx) ((mx) << 20) 00041 #define MBC_FROM_MBXR(mbc) (((mbc->mbc_flags)&MBC_FLAGS_MBXR) >> 20) 00042 00043 struct MailboxControl { 00044 u32 mbc_flags; 00045 u32 mbxw[MBOX_NUM]; /* mailbox write values */ 00046 u32 mbxr[MBOX_NUM]; /* mailbox read values */ 00047 }; 00048 00049 00050 /** immediate read */ 00051 #define ACQ200_MBOX_IOR _IOR(DMAGIC, 1, struct MailboxControl) 00052 /** non-blocking write ... NB dangerous to mix with blocking write */ 00053 #define ACQ200_MBOX_IOW _IOW(DMAGIC, 2, struct MailboxControl) 00054 /** write block read return */ 00055 #define ACQ200_MBOX_IOWR _IOWR(DMAGIC, 3, struct MailboxControl) 00056 00057 00058 00059 enum { 00060 EACQ32_NO_INCOMING_I2O = 3200, 00061 EACQ32_NO_MAPPING, 00062 EACQ32_OUT_OF_MAPPING_RANGE, 00063 EACQ32_OFFSET_NOT_ON_WHOLE_BUFFER_BOUNDARY 00064 }; 00065 00066 /** Swinging buffer operation 00067 * 00068 * BUFFER_A, BUFFER_B : filled in turn. 00069 * need to know - sequence number, length 00070 * need to return buffer to the pool when doen 00071 * a single ioctl call will: 00072 * - recycle buffers 00073 * - block on timeout 00074 * - return status of both BufferA, BufferB 00075 */ 00076 00077 #define BUFFERA 0 00078 #define BUFFERB 1 00079 00080 #define BUFFER_A_FLAG 0x1 00081 #define BUFFER_B_FLAG 0x2 00082 00083 #define BUFFER_FLAG_LUT "\x1\x2" 00084 00085 #define FOREVER ((long)(~0UL>>1)) /* MAX_SCHEDULE_TIMEOUT */ 00086 00087 #define FULL_EOF 0x80000000 00088 00089 struct BufferAB_Ops { 00090 struct ClientInstructions { 00091 unsigned recycle; /* client returns buff to circulation */ 00092 unsigned timeout; /* timeout ticks to block for */ 00093 } 00094 ci; 00095 struct DriverStatus { 00096 unsigned full; /* buffer full flags */ 00097 unsigned sid[2]; /* buffer sequence id numbers */ 00098 unsigned len[2]; /* data length in buffer (bytes) */ 00099 } 00100 ds; 00101 }; 00102 #define BUFFERAB_OPS_SZ (sizeof(struct BufferAB_Ops)) 00103 00104 #define ACQ200_BUFFER_AB_IOWR _IOWR(DMAGIC, 4, struct BufferAB_Ops) 00105 00106 00107 #endif /* __ACQ200_IOCTL_H__ */